The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Mar. 30, 2020
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Katsushi Nishiyama, Matsumoto, JP;

Masayuki Miyazaki, Matsumoto, JP;

Shoji Kitamura, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/04 (2006.01); H01L 29/36 (2006.01); H01L 29/66 (2006.01); H01L 29/872 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0465 (2013.01); H01L 21/046 (2013.01); H01L 29/36 (2013.01); H01L 29/6606 (2013.01); H01L 29/1608 (2013.01); H01L 29/872 (2013.01);
Abstract

To enhance efficiency of a process of implanting impurities into a silicon carbide semiconductor layer. To provide a method of manufacturing a semiconductor device including a silicon carbide semiconductor layer, the method of manufacturing including: implanting impurities multiple times to an impurity implantation region in the silicon carbide semiconductor layer to different depths, with temperature of the silicon carbide semiconductor layer being set to be equal to or lower than 150° C. In the implanting, impurities may be implanted multiple times to the impurity implantation region to different depths, with temperature of the silicon carbide semiconductor layer being set to be equal to or higher than room temperature.


Find Patent Forward Citations

Loading…