The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Dec. 19, 2018
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Yong Jin, Seoul, KR;

Du Yeong Roh, Gyeonggi-do, KR;

Dong Ju Lee, Seoul, KR;

Tae Jin Choi, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 3/06 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 3/061 (2013.01); G06F 3/064 (2013.01); G06F 3/0647 (2013.01); G06F 3/0679 (2013.01); G06F 2212/1008 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7205 (2013.01);
Abstract

Provided is an operating method of a memory system including a plurality of logical address groups each having a preset logical address range. The operation method may include: selecting a victim block; selecting a plurality of target blocks among empty blocks; mapping at least one logical address group of the logical address groups to each of the target blocks; determining a first logical address group including a logical address of first valid data stored in the victim block, among the logical address groups; and backing up the first valid data into a first target block mapped to the first logical address group among the target blocks.


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