The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Sep. 05, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Shinya Koizumi, Kamakura, JP;

Kouji Watanabe, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/30 (2006.01); G06F 13/16 (2006.01); G11C 5/14 (2006.01); G11C 11/4074 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3037 (2013.01); G06F 11/3058 (2013.01); G06F 13/1668 (2013.01); G11C 5/147 (2013.01); G11C 11/4074 (2013.01);
Abstract

A memory system includes a first memory chip, and a controller that includes a first circuit, a second circuit, and a third circuit. The third circuit is configured to manage a first differential power consumption value that is a difference between first and second power consumption values. The first power consumption value is on first power that the first memory chip consumes while executing a first operation. The second power consumption value is on second power that the first memory chip consumes when suspending the first operation. The third circuit is configured to determine whether causing the first memory chip to suspend the first operation to execute a second operation is possible based on the first differential power consumption value.


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