The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 03, 2021

Filed:

Sep. 12, 2018
Applicant:

Xockets, Inc., San Jose, CA (US);

Inventor:

Parin Bhadrik Dalal, Milpitas, CA (US);

Assignee:

Xockets, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); H04L 12/851 (2013.01); H04L 12/801 (2013.01); G06F 13/28 (2006.01); G06F 13/16 (2006.01); H04L 29/06 (2006.01); G06F 13/42 (2006.01); G06F 13/40 (2006.01); G06F 13/364 (2006.01); H04L 12/931 (2013.01); G06F 21/55 (2013.01);
U.S. Cl.
CPC ...
H04L 47/2441 (2013.01); G06F 13/1605 (2013.01); G06F 13/1652 (2013.01); G06F 13/1673 (2013.01); G06F 13/28 (2013.01); G06F 13/364 (2013.01); G06F 13/404 (2013.01); G06F 13/4022 (2013.01); G06F 13/4234 (2013.01); G06F 21/55 (2013.01); H04L 29/06 (2013.01); H04L 47/10 (2013.01); H04L 49/70 (2013.01); H04L 63/0227 (2013.01); Y02D 10/00 (2018.01);
Abstract

A device can include a server that includes a host processor and at least one hardware acceleration (hwa) module having at least one computing element formed thereon, the at least one computing element including processing circuits configured to execute a plurality of processes, first memory circuits, second memory circuits, and a data transfer fabric configured to enable data transfers between the processing circuits and the first and second memory circuits; wherein the at least one computing element is configured to transfer data to, or receive data from, any of: the processing circuits, the first memory circuits, the second memory circuits, or other computing elements coupled to the data transfer fabric.


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