The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11081576 B1

Date of Patent:

Aug. 03, 2021

Filed:

Dec. 24, 2019

Insulated-gate semiconductor device and method of manufacturing the same

Applicant:

Fuji Electric Co., Ltd., Kawasaki, JP;

Inventors:

Takamasa Ishikawa, Matsumoto, JP;

Seiji Noguchi, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki, JP;

Attorney:

Primary Examiner:

Syed I Gheyas

Int. Cl.

CPC ...

H01L 29/739 (2006.01); H01L 29/66 (2006.01); H01L 21/66 (2006.01); H01L 21/768 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/772 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/285 (2006.01); H01L 29/78 (2006.01);

U.S. Cl.

CPC ...

H01L 29/7397 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 22/14 (2013.01); H01L 29/0696 (2013.01); H01L 29/0804 (2013.01); H01L 29/0821 (2013.01); H01L 29/1004 (2013.01); H01L 29/4236 (2013.01); H01L 29/66348 (2013.01); H01L 21/02271 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/28035 (2013.01); H01L 21/28525 (2013.01); H01L 21/31116 (2013.01); H01L 29/66416 (2013.01); H01L 29/66734 (2013.01); H01L 29/7722 (2013.01); H01L 29/7813 (2013.01);

Abstract

A method of manufacturing an insulated-gate semiconductor device, includes: digging a gate trench and a dummy trench; burying a dummy electrode in the dummy trench via a gate insulating film and burying a gate electrode in the gate trench via the gate insulating film; exposing an upper portion of the dummy electrode and selectively forming an insulating film for testing so as to cover the gate electrode; depositing a conductive film for testing on the dummy electrode and the insulating film for testing; and selectively testing an insulating property of the gate insulating film in the dummy trench by applying a voltage between the conductive film for testing and the charge transport, region.

Find Patent Forward Citations