The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 2021
Filed:
Mar. 06, 2019
Applicant:
Magnachip Semiconductor, Ltd., Cheongju-si, KR;
Inventors:
Assignee:
MagnaChip Semiconductor, Ltd., Cheongju-si, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01); H01L 23/485 (2006.01); H01L 23/544 (2006.01); H01L 23/433 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/367 (2013.01); H01L 21/4853 (2013.01); H01L 21/56 (2013.01); H01L 21/561 (2013.01); H01L 23/485 (2013.01); H01L 23/544 (2013.01); H01L 24/83 (2013.01); H01L 21/568 (2013.01); H01L 23/3107 (2013.01); H01L 23/4334 (2013.01); H01L 2223/5448 (2013.01); H01L 2223/54433 (2013.01); H01L 2223/54486 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01);
Abstract
A method to manufacture a semiconductor package includes: preparing a metal substrate; attaching semiconductor dies to the metal substrate at an interval; attaching a bonding film to the semiconductor dies; applying a mold material on the semiconductor dies and the metal substrate, and curing the mold material to form a mold member; grinding the mold member and the metal substrate to a thickness; removing the bonding film; attaching a redistribution layer to the semiconductor dies; and cutting between the semiconductor dies.