The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 2021
Filed:
Nov. 22, 2019
Applicant:
Imec Vzw, Leuven, BE;
Inventors:
Hiroaki Arimura, Leuven, BE;
Antony Premkumar Peter, Heverlee, BE;
Hendrik F. W. Dekkers, Tienen, BE;
Assignee:
IMEC vzw, Leuven, BE;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28255 (2013.01); H01L 21/0228 (2013.01); H01L 21/02164 (2013.01); H01L 21/02274 (2013.01); H01L 29/4966 (2013.01); H01L 29/513 (2013.01);
Abstract
A method for forming a gate stack of a field-effect transistor includes depositing a Si capping layer on a Ge channel material (). The method further includes depositing an oxide layer on the Si capping layer by a plasma enhanced deposition technique at a temperature less than or equal to 200° C., and a plasma power less than or equal to 100 W.