The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2021

Filed:

Apr. 01, 2020
Applicant:

Fujitsu Limited, Kawasaki, JP;

Inventors:

Yuichiro Ajima, Kawasaki, JP;

Toshiyuki Shimizu, Kawasaki, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/04 (2006.01); G11C 5/06 (2006.01); G11C 7/10 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1051 (2013.01); G11C 5/04 (2013.01); G11C 5/06 (2013.01); G11C 7/1006 (2013.01); G11C 7/1015 (2013.01); G11C 29/44 (2013.01);
Abstract

A semiconductor memory apparatus includes a plurality of memory dies and a logic die, which are stacked to each other. The logic die includes a memory interface for a memory apparatus to be coupled to the semiconductor memory apparatus, and a switch coupled to a plurality of channels included in a control device which controls the semiconductor memory apparatus. The switch includes a first switch element which couples one of the plurality of channels to the memory interface or one of the plurality of memory dies, and a second switch element which couples another one of the plurality of channels to another one of the plurality of memory dies. Even if some memory dies are defective, the semiconductor memory apparatus is capable to operate.


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