The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2021

Filed:

Dec. 17, 2018
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Kyung-Rok Kim, Osan-si, KR;

Kimin Son, Osan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3275 (2016.01); G09G 3/32 (2016.01); G09G 3/3266 (2016.01); H01L 23/00 (2006.01); H01L 27/12 (2006.01); H01L 27/32 (2006.01); G06F 3/041 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3275 (2013.01); G06F 3/0412 (2013.01); G06F 3/04164 (2019.05); G09G 3/32 (2013.01); H01L 24/16 (2013.01); H01L 27/124 (2013.01); H01L 27/1248 (2013.01); H01L 27/32 (2013.01); G09G 2300/0408 (2013.01); G09G 2310/027 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/06 (2013.01); G09G 2310/08 (2013.01); H01L 27/3246 (2013.01); H01L 27/3258 (2013.01); H01L 27/3276 (2013.01); H01L 2224/16225 (2013.01);
Abstract

The light emitting display apparatus includes a substrate including a display area including a plurality of pixel areas and a non-display area surrounding the display area, a plurality of gate lines passing through the display area of the substrate, a plurality of data lines passing through the display area of the substrate, a plurality of pixel driving power lines passing through the display area of the substrate, a plurality of pixels respectively provided in the plurality of pixel areas of the substrate and connected to an adjacent gate line, an adjacent data line, and an adjacent pixel driving power line, and a gate buffer provided in the display area of the substrate and connected to a corresponding gate line of the plurality of gate lines.


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