The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2021

Filed:

May. 13, 2020
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Dilip Venkateswaran Murali, San Diego, CA (US);

Murali Krishna, San Diego, CA (US);

Thiyagarajan Selvam, San Diego, CA (US);

Sujeev Dias, San Marcos, CA (US);

Tony Truong, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3234 (2019.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3253 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Systems and methods for power management for Peripheral Component Interconnect express (PCIE) devices allow PCIE termini to enter advanced low-power states while a PCIE link is idle. These advanced low-power states may include scaling a clock frequency up through a complete shutdown of power rails and clocks within the PCIE terminus. Additionally, use of a wakeup signal such as a clock request (CLKREQ or CLKREQ #) signal may allow the terminus to wake relatively quickly and resume operation so as to avoid degradation of the user experience or loss of data.


Find Patent Forward Citations

Loading…