The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2021
Filed:
May. 22, 2018
Portwell Inc., New Taipei, TW;
Shih Yao Lin, New Taipei, TW;
PORTWELL INC., New Taipei, TW;
Abstract
A circuit board component layout determination method includes the steps of: (1) simulating the placement of components by a circuit board layout software program; (2) performing a circuit board component layout density analysis to obtain a circuit board component layout density percentage; (3) determining whether or not the simulated placement of components is feasible according to the circuit board component layout density percentage, and if yes, carrying out step (4); and (4) placing the components into the circuit board. The method uses a circuit board layout software program and a spreadsheet or a database to calculate the statistics of an area of a circuit board that can be laid and an area of the circuit board that cannot be laid, so as to analyze and determine the implementability of a component layout, and improve the control, efficiency and cost-effective of the component layout of the circuit board.