The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2021
Filed:
Sep. 06, 2019
Applicant:
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Inventors:
Saurabh Singh, Cedar Park, TX (US);
Vamsikrishna Parupalli, Austin, TX (US);
Stewart Kenly, Austin, TX (US);
Eric B. Smith, Austin, TX (US);
Assignee:
Cirrus Logic, inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 7/04 (2021.01); H03F 3/21 (2006.01); G02B 27/64 (2006.01);
U.S. Cl.
CPC ...
H03F 3/21 (2013.01); G02B 7/04 (2013.01); G02B 27/646 (2013.01); H03F 2200/33 (2013.01);
Abstract
A system may include an output stage comprising a single-ended driver for driving a load at an output of the output stage, a loop filter coupled at its input to the output of the output stage and configured to minimize an error between a target current signal received by the loop filter and an output current driven on the load, and control circuitry configured to, when the load current is driven in a manner such that the load current changes polarity, reset a state variable of the loop filter.