Integrated circuit including a low-noise amplifying circuit with asymmetrical source and drain regions and a logic circuit with symmetrical source and drain regions

Abstract

An integrated circuit includes a logic circuit and an amplifying circuit, in particular a low-noise amplifying circuit. The amplifying circuit includes at least one first transistor. The gate of the first transistor is coupled to a signal input terminal, the source region and the drain region of the first transistor are formed respectively in the well region of the first transistor on both sides of the gate, wherein the source region is coupled to a reference voltage terminal, and the sheet resistance of the source region is lower than that of the drain region. The logic circuit includes at least one second transistor. The sheet resistances of the source region and the drain region of the second transistor are equal.