The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2021

Filed:

Jun. 18, 2020
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Giovanni Campardo, Bergamo, IT;

Marco Omar Ghidoni, Melzo, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/13 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/13 (2013.01); H01L 24/13 (2013.01); H01L 24/29 (2013.01); H01L 24/45 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 24/85 (2013.01); H01L 2224/13 (2013.01); H01L 2924/18165 (2013.01);
Abstract

An integrated semiconductor device and a method for manufacturing the integrated semiconductor device are disclosed. In an embodiment an integrated semiconductor device includes a supporting substrate having a first substrate face and a second substrate face opposite to the first substrate face, a semiconductor die having a first die face coupled to the first substrate face of the supporting substrate, the first die face including first die contact pads, wherein the supporting substrate has at least one through opening, wherein the first die contact pads are arranged facing the through opening, and wherein the supporting substrate comprises first substrate contact pads connected by first bonding wires to the respective first die contact pads through the through opening.


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