The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2021

Filed:

Feb. 18, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jeongho Mun, Yongin-si, KR;

Naery Yu, Suwon-si, KR;

Sumin Kim, Suwon-si, KR;

Songse Yi, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823842 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01); H01L 21/32134 (2013.01); H01L 21/32139 (2013.01);
Abstract

A semiconductor device manufacturing method includes forming a gate dielectric layer surrounding first semiconductor patterns and second semiconductor patterns; forming a first organic pattern covering the second semiconductor patterns; forming a sacrificial pattern interposed between the first semiconductor patterns and exposing both side surfaces of the first semiconductor patterns, and a conductive pattern surrounding the second semiconductor patterns and disposed between the first organic pattern and the second semiconductor patterns; forming a second organic pattern covering the first semiconductor patterns, the gate dielectric layer, the sacrificial pattern, and the first organic pattern; and forming a cross-linking layer interposed between the first organic material pattern and the second organic material pattern.


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