The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2021

Filed:

Mar. 13, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Jan Otterstedt, Unterhaching, DE;

Jayachandran Bhaskaran, Neufahrn, DE;

Michael Goessel, Mahlow, DE;

Thomas Rabenalt, Unterhaching, DE;

Assignee:

INFINEON TECHNOLOGIES AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); H03M 13/37 (2006.01); H03M 13/45 (2006.01); H04L 25/02 (2006.01); H04L 25/06 (2006.01); H04L 1/00 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1076 (2013.01); H03M 13/37 (2013.01); H03M 13/451 (2013.01); H03M 13/458 (2013.01); H04L 1/00 (2013.01); H04L 1/0054 (2013.01); H04L 25/0244 (2013.01); H04L 25/067 (2013.01);
Abstract

A determination is made that error-correcting code functionality detected a first number of erroneous bits within a memory device. Bits within the memory device are evaluated to identify a subset of the bits as candidate bits. The candidate bits are evaluated to determine whether the error-correcting code functionality returns a non-error state, where no error correction is performed, based upon one or more combinations of candidate bits being inverted. Responsive to the error-correcting code functionality returning the non-error state for only one combination of the one or more combinations of candidate bits being inverted, the one combination of candidate bits is corrected.


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