The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2021

Filed:

Sep. 13, 2016
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Michael John Gibbs, Fulbourn, GB;

John Michael Horley, Hauxton, GB;

Assignee:

ARM LIMITED, Cambridge, GB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 11/36 (2006.01); G06F 9/30 (2018.01); G06F 9/32 (2018.01); G06F 11/34 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3806 (2013.01); G06F 9/3005 (2013.01); G06F 9/30181 (2013.01); G06F 9/32 (2013.01); G06F 9/3808 (2013.01); G06F 11/3471 (2013.01); G06F 11/3636 (2013.01); G06F 11/3644 (2013.01); G06F 11/3656 (2013.01);
Abstract

An apparatus has an input interface for receiving instruction execution information from processing circuitry, and trace generation circuitry for generating from the instruction execution information a trace stream. The instruction sequence from the processing circuitry includes at least one branch-future instruction that effectively turns an instruction identified by the branch-future instruction into a branch, and in particular causes the processing circuitry to branch to a target address identified by the branch-future instruction when that identified instruction is encountered within the instruction sequence. A branch control cache is used to store branch control information derived from the branch-future instruction, and the trace generation circuitry is arranged to detect, based on that branch control information, when the identified instruction has been encountered by the processing circuitry, and upon such detection to then issue within the trace stream a trace element to indicate that a branch to the target address has occurred.


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