The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2021
Filed:
Aug. 10, 2020
Massachusetts Institute of Technology, Cambridge, MA (US);
Lionel C. Kimerling, Concord, MA (US);
Jurgen Michel, Arlington, MA (US);
Anuradha M. Agarwal, Weston, MA (US);
Kazumi Wada, Lexington, MA (US);
Drew Michael Weninger, Cambridge, MA (US);
Samuel Serna, Somerville, MA (US);
Massachusetts Institute of Technology, Cambridge, MA (US);
Abstract
Optical interconnects can offer higher bandwidth, lower power, lower cost, and higher latency than electrical interconnects alone. The optical interconnect system enables both optical and electrical interconnection, leverages existing fabrication processes to facilitate package-level integration, and delivers high alignment tolerance and low coupling losses. The optical interconnect system provides connections between a photonics integrated chip (PIC) and a chip carrier and between the chip carrier and external circuitry. The system provides a single flip chip interconnection between external circuitry and a chip carrier using a ball grid array (BGA) infrastructure. The system uses graded index (GRIN) lenses and cross-taper waveguide couplers to optically couple components, delivers coupling losses of less than 0.5 dB with an alignment tolerance of ±1 μm, and accommodates a 2.5× higher bandwidth density.