The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2021

Filed:

Oct. 08, 2019
Applicant:

Energous Corporation, San Jose, CA (US);

Inventors:

Alister Hosseini, Phoenix, AZ (US);

Saman Kabiri, Aliso Viejo, CA (US);

Evangelos Kornaros, Santa Cruz, CA (US);

Michael A. Leabman, San Ramon, CA (US);

Assignee:

Energous Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 50/23 (2016.01); H01Q 1/02 (2006.01); H05K 1/02 (2006.01); H05K 3/30 (2006.01); H05K 3/46 (2006.01); H05K 1/11 (2006.01); H01Q 1/48 (2006.01); H01Q 9/04 (2006.01);
U.S. Cl.
CPC ...
H02J 50/23 (2016.02); H01Q 1/48 (2013.01); H01Q 9/0407 (2013.01); H05K 1/0203 (2013.01); H05K 1/0237 (2013.01); H05K 1/115 (2013.01); H05K 3/30 (2013.01); H05K 3/4644 (2013.01); H05K 2201/10098 (2013.01);
Abstract

A microstrip antenna for use in a wireless power transmission system and a method for forming the microstrip antenna are described. The antenna includes a first multi-layer printed circuit board (PCB) that includes a top surface and a bottom surface. The top and bottom surfaces of the first multi-layer PCB include a first electrically conductive material. The antenna includes a second multi-layer PCB that includes a top surface and a bottom surface. The top and bottom surfaces of the second multi-layer PCT include a second electrically conductive material. A first plurality of vias each substantially pass through the top and bottom surfaces of the first multi-layer PCB. A second plurality of vias each substantially pass through the top and bottom surfaces of the second multi-layer PCB. The antenna further comprises a dielectric slab that is configured to receive the first multi-layer PCB and the second multi-layer PCB.


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