The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2021

Filed:

Jul. 24, 2018
Applicant:

Honeywell International Inc., Morris Plains, NJ (US);

Inventors:

Dinesh Kumar KN, Bangalore, IN;

Sai Krishnan Jagannathan, Bangalore, IN;

Hemanth Vijaykumar, Bangalore, IN;

Assignee:

Honeywell International Inc., Charlotte, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); G05B 19/042 (2006.01); H02H 9/02 (2006.01); H04L 25/02 (2006.01);
U.S. Cl.
CPC ...
H02H 9/008 (2013.01); G05B 19/0425 (2013.01); H02H 9/026 (2013.01); H04L 25/0266 (2013.01); G05B 2219/14011 (2013.01); G05B 2219/24028 (2013.01); G05B 2219/34481 (2013.01);
Abstract

A system includes a module having at least one input/output (I/O) channel. The system also includes a terminal block having terminals configured to provide electrical connections for the at least one I/O channel. The system further includes a barrier assembly having one or more intrinsic safety (IS) barriers. Each IS barrier is configured to receive at least one data or power signal, limit an amount of energy in the at least one data or power signal, and output the at least one energy-limited data or power signal. Each IS barrier includes at least one limiter circuit configured to limit the amount of energy in the at least one data or power signal. Each IS barrier is configured to be mounted on the terminal block. Each IS barrier could be configured to provide galvanic isolation between multiple devices or systems coupled to the IS barrier. Each limiter circuit could include a current limiter.


Find Patent Forward Citations

Loading…