The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2021
Filed:
Jul. 29, 2019
Applicant:
L. Pierre DE Rochemont, Raleigh, NC (US);
Inventor:
L. Pierre de Rochemont, Raleigh, NC (US);
Assignee:
Other;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/3203 (2019.01); H01L 21/762 (2006.01); H01L 21/00 (2006.01); H01L 27/02 (2006.01); H01L 21/84 (2006.01); H01L 25/065 (2006.01); H01L 25/16 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 12/1009 (2016.01); G06F 13/16 (2006.01); G06F 13/24 (2006.01); G06F 1/324 (2019.01); G11C 7/10 (2006.01); G06F 1/28 (2006.01); G06F 12/0815 (2016.01); G06F 12/0862 (2016.01); G06F 12/0875 (2016.01); G06F 13/36 (2006.01); G06F 13/42 (2006.01); G06F 15/80 (2006.01); G06F 3/06 (2006.01); G06F 1/26 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3203 (2013.01); G06F 1/26 (2013.01); G06F 1/28 (2013.01); G06F 1/324 (2013.01); G06F 3/065 (2013.01); G06F 3/0619 (2013.01); G06F 3/0625 (2013.01); G06F 3/0685 (2013.01); G06F 9/3001 (2013.01); G06F 9/30043 (2013.01); G06F 9/30098 (2013.01); G06F 9/3802 (2013.01); G06F 12/0815 (2013.01); G06F 12/0862 (2013.01); G06F 12/0875 (2013.01); G06F 12/1009 (2013.01); G06F 13/1605 (2013.01); G06F 13/1673 (2013.01); G06F 13/1689 (2013.01); G06F 13/24 (2013.01); G06F 13/36 (2013.01); G06F 13/42 (2013.01); G06F 15/80 (2013.01); G11C 7/1072 (2013.01); H01L 21/00 (2013.01); H01L 21/76229 (2013.01); H01L 21/84 (2013.01); H01L 25/0652 (2013.01); H01L 25/16 (2013.01); H01L 27/0207 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/452 (2013.01); G06F 2212/602 (2013.01); G06F 2212/621 (2013.01); G06F 2212/65 (2013.01); G06F 2213/0038 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/14 (2013.01); H01L 2924/3011 (2013.01); Y02D 10/00 (2018.01); Y10S 257/00 (2013.01);
Abstract
A hybrid system-on-chip provides a plurality of memory and processor die mounted on a semiconductor carrier chip that contains a fully integrated power management system that switches DC power at speeds that match or approach processor core clock speeds, thereby allowing the efficient transfer of data between off-chip physical memory and processor die.