The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2021

Filed:

Dec. 03, 2019
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Ying-Yen Chen, Hsinchu, TW;

Jeong-Fa Sheu, Taoyuan, TW;

Chia-Jui Yang, Taipei, TW;

Po-Lin Chen, Chiayi County, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3177 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G06F 13/4068 (2013.01);
Abstract

The present disclosure relates to a circuit testing system, including a control circuit and an interface circuit. The control circuit is electrically connected to a test machine, and configured to receive a scan control signal. The I/O interface circuit is electrically connected to the control circuit, the test machine, the scan chain circuit and a circuit under test. When the scan control signal is at a first level, the control circuit is configured to control the I/O interface circuit to conduct the scan chain circuit to the test machine. When the scan control signal is at a second level, the control circuit is configured to control the I/O interface circuit to conduct the circuit under test to the test machine so as to propagate a response signal generated by the circuit under test to the test machine.


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