The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Nov. 23, 2015
Applicant:

Institute of Microelectronics, Chinese Academy of Sciences, Chaoyang District, CN;

Inventor:

Tianchun Ye, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 27/11568 (2017.01);
U.S. Cl.
CPC ...
H01L 29/66833 (2013.01); H01L 21/0228 (2013.01); H01L 21/02172 (2013.01); H01L 21/02244 (2013.01); H01L 21/02595 (2013.01); H01L 21/02667 (2013.01); H01L 27/1157 (2013.01); H01L 27/11568 (2013.01); H01L 27/11582 (2013.01); H01L 29/66545 (2013.01);
Abstract

A semiconductor device comprise a substrate, source/drain regions, a channel region, a gate dielectric layer and a gate conductive layer, wherein the gate dielectric layer comprises a barrier layer, a storage layer, a first interface layer, a tunneling layer, a second interface layer. In accordance with the semiconductor device and the manufacturing method of the present invention, an interface layer is added between the storage layer and tunneling layer in the gate dielectric by adjusting process step, and the peak concentration and peak location of nitrogen can be flexibly adjusted, effectively improving the quality of the interface between the storage layer and the tunneling layer in the gate dielectric layer, increasing process flexibility, improving device reliability and current characteristics.


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