The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Dec. 11, 2015
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Hiroshi Takahashi, Kanagawa, JP;

Tomofumi Arakawa, Tokyo, JP;

Minoru Ishida, Tokyo, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H01L 25/10 (2006.01); H01L 23/485 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); G11C 5/00 (2006.01); G11C 29/00 (2006.01); G11C 5/02 (2006.01); H01L 25/07 (2006.01); G06F 12/00 (2006.01); G11C 7/16 (2006.01); H01L 27/146 (2006.01); H04N 5/378 (2011.01); H01L 25/11 (2006.01); G11C 5/06 (2006.01); G11C 7/10 (2006.01); G11C 8/10 (2006.01); H01L 27/118 (2006.01); H03K 19/0175 (2006.01); H04N 5/907 (2006.01); H04N 5/225 (2006.01); H04N 5/77 (2006.01); H01L 23/482 (2006.01); H01L 25/075 (2006.01); H01L 25/04 (2014.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); G06F 12/00 (2013.01); G11C 5/00 (2013.01); G11C 5/02 (2013.01); G11C 5/025 (2013.01); G11C 5/06 (2013.01); G11C 7/1012 (2013.01); G11C 7/16 (2013.01); G11C 8/10 (2013.01); G11C 29/00 (2013.01); G11C 29/70 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/528 (2013.01); H01L 25/07 (2013.01); H01L 25/117 (2013.01); H01L 25/18 (2013.01); H01L 27/118 (2013.01); H01L 27/146 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H03K 19/017581 (2013.01); H04N 5/378 (2013.01); H04N 5/907 (2013.01); H01L 21/76897 (2013.01); H01L 23/48 (2013.01); H01L 23/485 (2013.01); H01L 23/4824 (2013.01); H01L 23/4825 (2013.01); H01L 25/04 (2013.01); H01L 25/043 (2013.01); H01L 25/0756 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06565 (2013.01); H01L 2924/0002 (2013.01); H04N 5/772 (2013.01); H04N 2005/2255 (2013.01);
Abstract

The present technology relates to a semiconductor apparatus, a production method, and an electronic apparatus that enable semiconductor apparatuses to be laminated and the laminated semiconductor apparatuses to be identified. A semiconductor apparatus that is laminated and integrated with a plurality of semiconductor apparatuses, includes a first penetrating electrode for connecting with the other semiconductor apparatuses and a second penetrating electrode that connects the first penetrating electrode and an internal device, the second penetrating electrode being arranged at a position that differs for each of the laminated semiconductor apparatuses. The second penetrating electrode indicates a lamination position at a time of lamination. An address of each of the laminated semiconductor apparatuses in a lamination direction is identified by writing using external signals after lamination. The present technology is applicable to a memory chip and an FPGA chip.


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