The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2021
Filed:
Jun. 24, 2019
Applicant:
Lumentum Technology Uk Limited, Towcester, GB;
Inventors:
Assignee:
Lumentum Technology UK Limited, Northamptonshire, GB;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 25/04 (2014.01); H01L 25/065 (2006.01); H01L 25/07 (2006.01); H01L 25/11 (2006.01); H01L 21/56 (2006.01); H01L 21/32 (2006.01); H01L 21/78 (2006.01); H01L 25/075 (2006.01);
U.S. Cl.
CPC ...
H01L 21/561 (2013.01); H01L 21/32 (2013.01); H01L 23/3157 (2013.01); H01L 21/78 (2013.01); H01L 25/043 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 25/071 (2013.01); H01L 25/074 (2013.01); H01L 25/0756 (2013.01); H01L 25/112 (2013.01); H01L 25/117 (2013.01);
Abstract
Described is a semiconductor substrate stack, including: a plurality of semiconductor substrates arranged in a stack in which the semiconductor substrates include opposing facing surfaces, wherein the facing surfaces of adjacent semiconductor substrates are separated by a gap, each semiconductor substrate having an edge surface at an exposed edge of the stack. A spacer is attached to one of the facing surfaces of each of the at least one of the semiconductor substrates and extends between adjacent semiconductor substrates to define the gap and mask a central portion of each respective semiconductor substrate.