The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Feb. 01, 2016
Applicant:

Amazon Technologies, Inc., Seattle, WA (US);

Inventors:

Kypros Constantinides, Seattle, WA (US);

Darin Lee Frink, Lake Tapps, WA (US);

Assignee:

Amazon Technologies, Inc., Seattle, WA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 1/18 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4068 (2013.01); G06F 13/4282 (2013.01); G06F 1/185 (2013.01); G06F 13/4027 (2013.01);
Abstract

A system includes a rack with multiple hardware acceleration devices and at least one modular controller coupled together into one or more particular processing systems. Each modular hardware acceleration device includes multiple hardware accelerators, such as graphical processing units (GPUs), field programmable gate arrays (FPGAs), or other specialized processing circuits. In each modular hardware acceleration device, the multiple hardware accelerators are communicatively coupled to a multi-port connection device, such as a switch, that is also communicatively coupled to at least two external ports of the modular hardware acceleration device. A modular controller of a particular processing system coordinates operation of hardware accelerators of multiple hardware acceleration devices included in the particular processing system to provide advanced processing capabilities. Modular hardware acceleration devices may be added to or taken away from particular processing systems to adjust advanced processing capabilities of the particular processing systems.


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