The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Mar. 28, 2018
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Vladislav Bolkhovitin, San Jose, CA (US);

Sanjay Subbarao, Irvine, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/1072 (2016.01);
U.S. Cl.
CPC ...
G06F 3/0607 (2013.01); G06F 3/067 (2013.01); G06F 3/0647 (2013.01); G06F 3/0658 (2013.01); G06F 12/1072 (2013.01); G06F 2212/1048 (2013.01); G06F 2212/154 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/254 (2013.01);
Abstract

A system and method improve the performance of non-volatile memory storage by automatically, when one or more data storage devices are added to a first set of storage devices in a storage system, resulting in a second set of storage devices, remapping data stored in the first set of storage devices so as to redistribute data across the second set of storage devices while minimizing the amount of data moved to the newly added storage devices. In addition, the remapping and redistribution of data results in empty logical address regions in data storage devices from which data is copied, and a logical address compaction operation is used to remap one or more logical address ranges so as to eliminate the empty logical address regions, without moving data corresponding to the remapped logical address ranges.


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