The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Mar. 27, 2020
Applicant:

Foveon, Inc., Milpitas, CA (US);

Inventors:

Shrinath Ramaswami, San Jose, CA (US);

Tatsuya Inui, Kawasaki, JP;

Shigemi Yamazaki, Kawasaki, JP;

Jonathan Yu, Union City, CA (US);

Glenn Keller, West Chester, PA (US);

Assignee:

Foveon, Inc., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/378 (2011.01); H04N 9/04 (2006.01); H01L 27/146 (2006.01); H04N 5/376 (2011.01); H04N 5/374 (2011.01);
U.S. Cl.
CPC ...
H04N 9/04511 (2018.08); H01L 27/14645 (2013.01); H04N 5/376 (2013.01); H04N 5/378 (2013.01); H04N 9/04557 (2018.08); H04N 5/374 (2013.01);
Abstract

In an array of multi-color vertical detector color pixel sensors, a readout wiring architecture includes a transfer transistor for each individual color detector. In first and second rows in a first column, the first, second, and third color transfer transistor gates are coupled, respectively, to the first, second, and third row-select lines. In a first row in a second column, the first color transfer transistor gate is coupled to the second row-select line, the second color transfer transistor gate is coupled to the first row-select line, and the third color transfer transistor gate is coupled to the third row-select line. In a second row in the second column, the first color transfer transistor gate is coupled to the first row-select line, the second color transfer transistor gate is coupled to the third row-select line, and t the third color transfer transistor gate is coupled to the second row-select line.


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