The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Apr. 08, 2019
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Nicholaus Smith, La Mesa, CA (US);

Chan Young Jeong, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02J 50/10 (2016.01); H02J 50/90 (2016.01); H04B 17/21 (2015.01); H02J 7/02 (2016.01); H04B 5/00 (2006.01); H02J 50/80 (2016.01);
U.S. Cl.
CPC ...
H02J 50/90 (2016.02); H02J 7/025 (2013.01); H02J 50/10 (2016.02); H02J 50/80 (2016.02); H04B 5/0037 (2013.01); H04B 17/21 (2015.01);
Abstract

Embodiments herein provide a device for calibrating a voltage driven by a PWM signal for a circuit board. The device includes a controller configured to generate the PWM signal according to a PWM duty cycle value, and a voltage regulator configured to generate an output voltage according to the PWM signal. The controller is further configured to calibrate a relationship between the PWM duty cycle value and the output voltage based on a plurality of configured PWM duty cycle values and a plurality of corresponding voltages measured from the voltage regulator, and drive the circuit board by configuring the PWM duty cycle value based on the calibrated relationship.


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