The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Nov. 07, 2019
Applicant:

Nexchip Semiconductor Co., Ltd., Anhui, CN;

Inventor:

Geeng-Chuan Chern, Anhui, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); G11C 5/06 (2006.01); H01L 27/11519 (2017.01); H01L 27/11524 (2017.01);
U.S. Cl.
CPC ...
H01L 29/42328 (2013.01); G11C 5/063 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01);
Abstract

The present invention provides a non-volatile memory and a manufacturing method for the same. A floating gate structure of the non-volatile memory is located on one side of a word line structure, and includes a second gate dielectric layer and a second conductive layer in sequence from bottom to top. The second conductive layer has a first sharp portion, a second sharp portion, and a sharp depression portion located between the two sharp portions. An erasing gate structure is located above the floating gate structure, and includes a tunneling dielectric layer and a third conductive layer in sequence from bottom to top. The tunneling dielectric layer covers tip parts of the first and second sharp portions, and is filled into the sharp depression portion. The third conductive layer has a third sharp portion at a position corresponding to the sharp depression portion.


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