Solid-state imaging element, electronic device, and fabrication method

Abstract

This disclosure relates to a solid-state imaging element, an electronic device, and a fabrication method that each enable further reduction of the element layout area. A photoelectric conversion element disposed on a first face of a semiconductor substrate is connected to a gate of an amplification transistor and a floating diffusion disposed in a second face of the semiconductor substrate through penetrating electrodes that are each connected to the photoelectric conversion element. In this pixel structure, a dielectric layer is disposed between the penetrating electrodes in the second face, and a shielded electrode is disposed on an inner side of the dielectric layer seen from a side of the second face. The dielectric layer is thicker than a gate insulating film of the transistor on the side of the second face. This disclosure is applicable to a back-side illumination solid-state imaging element, for example.