The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Feb. 19, 2019
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Hideaki Yamakoshi, Tokyo, JP;

Shinichiro Abe, Tokyo, JP;

Takashi Hashimoto, Tokyo, JP;

Yuto Omizu, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 27/11573 (2017.01); H01L 27/11568 (2017.01); H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 21/311 (2006.01); H01L 21/266 (2006.01); H01L 21/265 (2006.01); H01L 29/10 (2006.01); H01L 29/792 (2006.01); H01L 27/02 (2006.01); H01L 27/12 (2006.01); H01L 21/84 (2006.01); H01L 21/027 (2006.01); H01L 29/08 (2006.01); H01L 29/49 (2006.01); H01L 21/02 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11573 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/31111 (2013.01); H01L 21/31144 (2013.01); H01L 21/76283 (2013.01); H01L 21/84 (2013.01); H01L 27/0207 (2013.01); H01L 27/11568 (2013.01); H01L 27/1207 (2013.01); H01L 29/1033 (2013.01); H01L 29/1095 (2013.01); H01L 29/66568 (2013.01); H01L 29/66833 (2013.01); H01L 29/792 (2013.01); H01L 21/0273 (2013.01); H01L 21/02164 (2013.01); H01L 21/02271 (2013.01); H01L 21/3065 (2013.01); H01L 21/31116 (2013.01); H01L 29/0847 (2013.01); H01L 29/4916 (2013.01); H01L 29/6656 (2013.01);
Abstract

A MONOS transistor as a first transistor can have improved reliability and a change in channel-width dependence of the property of a second transistor can be suppressed. The semiconductor device according to one embodiment includes a semiconductor substrate having first and second regions on the first main surface, an insulating film on the second region, a semiconductor layer on the insulating film, a memory transistor region in the first region, a first transistor region in the second main surface of the semiconductor layer, a first element isolation film surrounding the memory transistor region, and a second element isolation film surrounding the first transistor region. A first recess depth between the bottom of the first recess and the first main surface in the memory transistor region is larger than a second recess depth between the bottom of a second recess and the second main surface in the first transistor region.


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