The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Dec. 20, 2019
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Seung Ho Jung, Yongin-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 23/00 (2006.01); H01L 21/68 (2006.01); G11C 16/06 (2006.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
H01L 22/30 (2013.01); G11C 16/06 (2013.01); H01L 21/68 (2013.01); H01L 23/544 (2013.01); H01L 24/95 (2013.01);
Abstract

A semiconductor memory device includes a first chip having a first pad and a first misalignment detection pattern on a first surface; and a second chip having a second pad and a second misalignment detection pattern on a second surface, and bonded to the first surface of the first chip such that the second pad is coupled with the first pad. The second chip includes a misalignment detection circuit which is coupled between the second misalignment detection pattern and a test pad and outputs a first voltage provided from the first misalignment detection pattern, to the test pad, in the case where a misalignment between the first chip and the second chip exceeds a preset value such that the first misalignment detection pattern and the second misalignment detection pattern are shorted to each other.


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