The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Sep. 01, 2020
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Frank Tzen-Wen Guo, Danville, CA (US);

Bhuvaneshwari Ayyagari-Sangamalli, Cupertino, CA (US);

Angada B. Sachid, San Jose, CA (US);

Blessy Alexander, Dublin, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/08 (2006.01); G11C 7/06 (2006.01); G11C 11/16 (2006.01);
U.S. Cl.
CPC ...
G11C 7/08 (2013.01); G11C 7/065 (2013.01); G11C 11/1655 (2013.01); G11C 11/1673 (2013.01);
Abstract

A memory circuit may include a memory array, and the memory array may include a plurality of data columns. The plurality of data columns may be configured to store data bits and provide data signals when selected by a read operation. The memory array may also include one or more reference columns distributed in the memory array and configured to provide a reference signal. The reference signal may track with process, voltage, and temperature variations that are specific to the memory array, and may be used to remove a common signal component and adjust the signal level to distinguish between logic 0 and logic 1 data signals.


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