The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2021
Filed:
Dec. 11, 2017
Applicant:
Amazon Technologies, Inc., Seattle, WA (US);
Inventors:
Thomas A. Volpe, Austin, TX (US);
Mark Anthony Banse, Austin, TX (US);
Steven Scott Larson, Georgetown, TX (US);
Assignee:
Amazon Technologies, Inc., Seattle, WA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 30/33 (2020.01); G06F 12/1072 (2016.01); G11C 11/4072 (2006.01); G06F 11/07 (2006.01); G11C 29/00 (2006.01); G06F 12/1009 (2016.01); G06F 3/06 (2006.01); G06F 30/331 (2020.01);
U.S. Cl.
CPC ...
G06F 12/1072 (2013.01); G06F 3/0613 (2013.01); G06F 3/0656 (2013.01); G06F 3/0658 (2013.01); G06F 3/0688 (2013.01); G06F 11/073 (2013.01); G06F 11/0727 (2013.01); G06F 11/0793 (2013.01); G06F 12/10 (2013.01); G06F 12/1009 (2013.01); G06F 30/331 (2020.01); G11C 11/4072 (2013.01); G11C 29/76 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/313 (2013.01); G06F 2212/7203 (2013.01); G11C 2211/5641 (2013.01);
Abstract
An access device may be implemented to provide one or more access channels to non-volatile memory. Memory mapping implemented at the access device may direct a memory controller of the access device to perform access requests, replacing an initial storage location with a different storage location to access in the non-volatile memory device. Address scrambling, encryption, and other modifications to performing an access request may be implemented at the access device, in some embodiments, in addition to the memory mapping techniques.