The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Apr. 29, 2019
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Ching Elizabeth Ho, Santa Clara, CA (US);

Hao Chen, San Ramon, CA (US);

Nitin Bhargava, Santa Clara, CA (US);

Syed F. Ali, Irvine, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/329 (2019.01); G06F 1/3228 (2019.01);
U.S. Cl.
CPC ...
G06F 1/329 (2013.01); G06F 1/3228 (2013.01);
Abstract

An apparatus includes a plurality of processor cores, a cache memory that includes a plurality of banks, and a power management circuit. The power management circuit is configured to maintain a power credit approach for the apparatus that includes tracking a total number of currently available power credits, and to store a plurality of threshold values. Each threshold value is associated with one or more of a plurality of throttling actions. In response to the total number of currently available power credits reaching a particular threshold value of the plurality of threshold values, the power management circuit performs the one or more throttling actions associated with the particular threshold value. The plurality of throttling actions includes selectively throttling one or more of the plurality of processor cores, and selectively throttling one or more of the plurality of banks in the cache memory.


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