The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Jul. 30, 2020
Applicant:

Shanghai Avic Opto Electronics Co., Ltd., Shanghai, CN;

Inventors:

Shoufu Jian, Shanghai, CN;

Feng Qin, Shanghai, CN;

Dandan Qin, Shanghai, CN;

Benshun Zhong, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1362 (2006.01); G02F 1/1345 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G02F 1/1345 (2013.01); G02F 1/1368 (2013.01); G02F 1/13452 (2013.01); G02F 1/13454 (2013.01); G02F 1/13458 (2013.01);
Abstract

Provided are a display panel and a display apparatus. The display panel has a bonding region where a chip is bonded, and a fan-out region where fan-out leads is arranged. Bonding pads in the bonding region include a first pad array and a second pad array, the first pad array being at a side of the second pad array close to the display region. The first pad array includes first pads arranged in at least two rows. The first pad array includes at least one inclined section including at least three first pads that are arranged sequentially and obliquely away from the display region. Such an arrangement allows at least a portion of the fan-out leads to be displaced into the bonding region, to increase the area for arranging the fan-out leads. Therefore, the lower border of the display panel is narrowed.


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