The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Nov. 09, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Wilson Pradeep, Bangalore, IN;

Prakash Narayanan, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); G01R 31/3177 (2006.01); G11C 29/56 (2006.01); G06F 11/10 (2006.01); G11C 29/36 (2006.01); G11C 29/42 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/31718 (2013.01); G01R 31/31724 (2013.01); G06F 11/1048 (2013.01); G06F 11/1068 (2013.01); G11C 29/36 (2013.01); G11C 29/42 (2013.01); G11C 29/56004 (2013.01); G11C 2029/3602 (2013.01); G11C 2029/5602 (2013.01);
Abstract

A test override circuit includes a memory that includes multiple memory instances. A path selector receives a control signal from automatic test pattern generator equipment (ATE) to control data access to data paths that are operatively coupled between the memory instances and a plurality of logic endpoints. The path selector generates an output signal that indicates which of the data paths is selected in response to the control signal. A gating circuit enables the selected data paths to be accessed by at least one of the plurality of logic endpoints in response to the output signal from the path selector.


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