The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2021

Filed:

Jun. 05, 2018
Applicant:

Osram Opto Semiconductors Gmbh, Regensburg, DE;

Inventor:

Peter Fuchs, Regensburg, DE;

Assignee:

OSRAM OLED GMBH, Regensburg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01S 5/00 (2006.01); H01S 5/028 (2006.01); H01S 5/323 (2006.01); H01S 5/40 (2006.01); H01S 5/30 (2006.01);
U.S. Cl.
CPC ...
H01S 5/0287 (2013.01); H01S 5/0282 (2013.01); H01S 5/32308 (2013.01); H01S 5/4031 (2013.01); H01S 5/3013 (2013.01); H01S 2304/02 (2013.01);
Abstract

An edge emitting semiconductor laser and a method for operating an edge emitting semiconductor laser are disclosed. In an embodiment an edge-emitting semiconductor laser includes a semiconductor layer sequence having an active zone configured to generate laser radiation from the material system AlInGaAs, a facet on the semiconductor layer sequence configured to couple-out and/or reflect the laser radiation and a protective layer sequence directly on the facet protecting the facet from damage, the protective layer sequence including a monocrystalline starting layer of a group 12 group 16 material, an intermediate layer of Si and at least one finishing layer consisting essentially of Al, Si and/or Ta and of O and optionally of N, so that the finishing layer is of a different material system than the starting layer and the intermediate layer, wherein the intermediate layer is oxidized on a side facing the finishing layer, and wherein the protective layer is arranged in a direction away from the semiconductor layer sequence in the indicated order.


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