The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2021

Filed:

Jun. 13, 2017
Applicant:

The Regents of the University of Michigan, Ann Arbor, MI (US);

Inventors:

Zhengya Zhang, Ann Arbor, MI (US);

Chester Liu, Ann Arbor, MI (US);

Phil Knag, Portland, OR (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 3/02 (2006.01); G06F 9/50 (2006.01); G06F 1/3293 (2019.01); G06N 3/063 (2006.01); G06N 3/08 (2006.01); G06N 3/04 (2006.01); G06N 20/10 (2019.01);
U.S. Cl.
CPC ...
G06N 3/02 (2013.01); G06F 1/3293 (2013.01); G06F 9/505 (2013.01); G06N 3/0454 (2013.01); G06N 3/0472 (2013.01); G06N 3/063 (2013.01); G06N 3/088 (2013.01); G06N 20/10 (2019.01); G06F 9/5094 (2013.01); Y02D 10/00 (2018.01); Y02D 30/50 (2020.08);
Abstract

An information processor is provided that includes an inference module configured to extract a subset of data from information in an input and a classification module configured to classify the information in the input based on the extracted data. The inference module includes a first plurality of convolvers acting in parallel to apply each of N1 convolution kernels to each of N2 portions of the input image in order to generate an interim sparse representation of the input and a second plurality of convolvers acting in parallel to apply each of N3 convolution kernels to each of N4 portions of the interim sparse representation to generate a final sparse representation containing the extracted data. In order to take advantage of sparsity in the interim sparse representation, N3 is greater than N4 to parallelize processing in a non-sparse dimension and/or the second plurality of convolvers comprise sparse convolvers.


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