The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2021

Filed:

Apr. 23, 2019
Applicant:

Fujitsu Limited, Kawasaki, JP;

Inventors:

Kunihiko Matsumoto, Kasuga, JP;

Naoyuki Takeshita, Fukuoka, JP;

Masahiro Dohi, Fukuoka, JP;

Hisaya Urabe, Fukuoka, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 11/34 (2006.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 11/076 (2013.01); G06F 11/0736 (2013.01); G06F 11/0754 (2013.01); G06F 11/20 (2013.01); G06F 11/348 (2013.01); G06F 2201/81 (2013.01); G06F 2201/85 (2013.01);
Abstract

A failure prediction apparatus includes a memory and a processor coupled to the memory. The processor acquires a score based on an output of each of a plurality of sensors associated with each of a plurality of circuit arrangement regions, in each of the plurality of circuit arrangement regions a logic circuit constructed by programming is arrangeable, and performs a process of making a determination on a possibility of an occurrence of a failure with respect to each of the plurality of circuit arrangement regions based on the score for each of the circuit arrangement regions.


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