The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2021

Filed:

Oct. 12, 2018
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Seung Jun Cha, Daejeon, KR;

Jin Mee Kim, Daejeon, KR;

Seung Hyub Jeon, Anyang, KR;

Sung In Jung, Daejeon, KR;

Yeon Jeong Jeong, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 9/48 (2006.01); G06F 9/38 (2018.01); G06F 9/54 (2006.01); G06F 15/163 (2006.01); G06F 12/1072 (2016.01);
U.S. Cl.
CPC ...
G06F 9/45558 (2013.01); G06F 9/3877 (2013.01); G06F 9/4881 (2013.01); G06F 9/544 (2013.01); G06F 9/545 (2013.01); G06F 15/163 (2013.01); G06F 12/1072 (2013.01); G06F 2009/45583 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/656 (2013.01); G06F 2212/657 (2013.01);
Abstract

Disclosed is an apparatus and method of processing input and output in a multi-kernel system. A method of processing input and output in a multi-kernel system according to the present disclosure includes: setting a shared memory between a first kernel on a main processor and a lightweight kernel on a parallel processor; setting a data transmission and reception channel between the first kernel on the main processor and the lightweight kernel on the parallel processor using the shared memory; providing, on the basis of the data transmission and reception channel, an input/output task that occurs in the lightweight kernel to the first kernel on the main processor; processing, by the first kernel on the main processor, an operation corresponding to the input/output task; and providing a result of the processing to the lightweight kernel.


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