The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 2021
Filed:
Mar. 25, 2019
Applicant:
Nxp B.v., Eindhoven, NL;
Inventors:
Siamak Delshadpour, Phoenix, AZ (US);
Xiaoqun Liu, Chandler, AZ (US);
Assignee:
NXP B.V., Eindhoven, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H02H 9/04 (2006.01); H03K 17/0812 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); G01R 31/2884 (2013.01); H02H 9/041 (2013.01); H03K 17/08122 (2013.01); G01R 31/28 (2013.01); H02H 9/04 (2013.01); H03K 17/0812 (2013.01);
Abstract
An over-voltage tolerant test bus for an integrated circuit (IC) is disclosed. The over-voltage tolerant test bus includes a first switch to be coupled to a test pin of the IC and a second switch to be coupled to an internal module of the IC. The second switch is coupled to the first switch in series. The over-voltage tolerant test bus also includes a protection circuit coupled between the first switch and the second switch and a supply voltage to keep a voltage between a source and a drain of the first switch substantially equal to a difference between a voltage at the test pin and the supply voltage.