The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2021

Filed:

Nov. 06, 2019
Applicant:

Imec Vzw, Leuven, BE;

Inventors:

Doyoung Jang, Heverlee, BE;

Min-Soo Kim, Kessel-Lo, BE;

Assignee:

IMEC vzw, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 21/823431 (2013.01); H01L 29/0673 (2013.01); H01L 29/66795 (2013.01);
Abstract

In one aspect, a method of forming a semiconductor device includes removing a first dummy gate part extending across a first fin within a first gate trench section in an insulating layer, wherein the first dummy gate part is removed selectively to a second dummy gate part extending across a second fin within a second gate trench section in the insulating layer, and wherein each of the first and second fins is formed by a layer stack including a first layer and a second layer on the first layer, the first layer including SiGeand the second layer including SiGe, wherein 0≤x≤1 and 0≤y≤1 and x≠y. The method includes forming a silicon capping layer on a portion of the first fin exposed in the first gate trench section, performing an oxidation process to oxidize the silicon capping layer and to oxidize an outer thickness portion of the portion of the first fin such that a trimmed fin portion including laterally trimmed first and second layer portions remains inside the oxidized outer thickness portion, and subsequent to performing the oxidation process, removing the second dummy gate while the oxidized silicon capping layer and the oxidized outer thickness portion covers the trimmed fin portion. The method also includes removing the oxidized silicon capping layer and the oxidized outer thickness portion from the trimmed fin portion, removing the laterally trimmed first layer portion exposed in the first gate trench section and a first layer portion exposed in the second gate trench section, and forming a final gate structure around the laterally trimmed second layer portion in the first gate trench section and around a second layer portion in the second gate trench section.


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