The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 15, 2021
Filed:
Jun. 28, 2018
Sharp Kabushiki Kaisha, Sakai, JP;
Tatsuya Kawasaki, Sakai, JP;
Hideki Kitagawa, Sakai, JP;
Yoshihito Hara, Sakai, JP;
Masaki Maeda, Sakai, JP;
Toshikatsu Itoh, Sakai, JP;
Hajime Imai, Sakai, JP;
Tohru Daitoh, Sakai, JP;
SHARP KABUSHIKI KAISHA, Sakai, JP;
Abstract
The present invention provides a thin-film transistor array substrate that prevents semiconductor layers of thin-film transistor elements from having step disconnection even when the frame width is reduced. The thin-film transistor array substrate of the present invention includes a thin-film transistor element in a pixel region and a terminal in a terminal region. The thin-film transistor array substrate sequentially includes a support, an insulating layer, a gate electrode, a gate insulating layer, and a semiconductor layer in a cross-sectional view of the pixel region. A region with the insulating layer encompasses a region with the semiconductor layer in a plan view of the pixel region. The thin-film transistor array substrate sequentially includes the support, a lead line extending from the terminal, and the insulating layer in a cross-sectional view of the terminal region.