The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2021

Filed:

Jul. 08, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Seok-Cheon Baek, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/1157 (2017.01); H01L 27/11524 (2017.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 21/311 (2006.01); H01L 21/28 (2006.01); H01L 21/768 (2006.01); H01L 27/11548 (2017.01); G11C 16/26 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1157 (2013.01); H01L 21/31111 (2013.01); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5221 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 27/11524 (2013.01); H01L 27/11548 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01); H01L 29/40114 (2019.08); H01L 29/40117 (2019.08); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01);
Abstract

A semiconductor memory device includes a substrate including a cell region on which memory sells are disposed and a connection region on which conductive patterns are disposed, the conductive patterns electrically connected to the memory cells; a first word line stack including a plurality of first word lines that are stacked on the substrate in the cell region and extend to the connection region; a second word line stack including a plurality of second word lines that are stacked on the substrate in the cell region and extend to the connection region, the second word line stack being adjacent to the first word line stack; vertical channels disposed on the cell region of the substrate, the vertical channels being connected to the substrate and respectively coupled with the plurality of first and second word lines; a bridge connecting one of the plurality of first word lines in the first word line stack to a corresponding word line of the second word line stack.


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