The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2021

Filed:

May. 29, 2020
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Rakshit Tikoo, Uttar Pradesh, IN;

Ankit Naghate, Karnataka, IN;

Yogendra Singh Sikarwar, Karnataka, IN;

Arun Thandapani, Karnataka, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G11C 11/56 (2006.01); G06F 12/02 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0631 (2013.01); G06F 3/064 (2013.01); G06F 3/0611 (2013.01); G06F 3/0653 (2013.01); G06F 3/0673 (2013.01); G06F 12/02 (2013.01); G06F 12/0246 (2013.01); G11C 11/5621 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/1036 (2013.01); G11C 16/0483 (2013.01); G11C 2211/5641 (2013.01); G11C 2211/5644 (2013.01);
Abstract

A storage system and method for smart folding are provided. In one example, the storage system has a memory with a plurality of single level cell (SLC) blocks and a multi-level cell (MLC) block. The MLC block has a plurality of pages, each with a different sense time. The storage system tracks a read count of each of the plurality of SLC blocks and determines how to fold the plurality of SLC blocks into the plurality of pages based on the read count of each of the plurality of SLC blocks and the sense time of each of the plurality of pages. In this way, SLC blocks with higher read counts can be folded into pages that have faster sense times.


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