The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2021

Filed:

Mar. 02, 2020
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventor:

Martin Podzemny, Lesna, CZ;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/575 (2006.01); G05F 1/46 (2006.01); G05G 1/56 (2008.04); G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G05F 1/10 (2013.01); G05F 1/46 (2013.01); G05G 1/56 (2013.01);
Abstract

A voltage regulator circuit may include a first loop that forms a reference signal that substantially does not vary in response to the output voltage, the reference circuit may also be configured to form a control signal that is representative of changes in the reference signal. The voltage regulator circuit may also include a second loop configured to form a value of a control electrode of an output transistor according to the control signal and wherein the output circuit is configured to change a value of the control electrode according to a difference between the output voltage and the reference signal.


Find Patent Forward Citations

Podzemny, Martin. (2021). Method of forming a semiconductor device and circuit (U.S. Patent No. 11036248). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11036248

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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