The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 15, 2021

Filed:

Jun. 07, 2018
Applicant:

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventors:

Kota Shikama, Tokyo, JP;

Hiroshi Ishikawa, Tokyo, JP;

Yuko Kawajiri, Tokyo, JP;

Atsushi Aratake, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/36 (2006.01); G02B 6/42 (2006.01); G02B 6/24 (2006.01); G02B 6/125 (2006.01); G02B 6/26 (2006.01); G02B 6/12 (2006.01);
U.S. Cl.
CPC ...
G02B 6/4231 (2013.01); G02B 6/24 (2013.01); G02B 6/36 (2013.01); G02B 6/3636 (2013.01); G02B 6/3648 (2013.01); G02B 6/4219 (2013.01); G02B 6/125 (2013.01); G02B 6/12019 (2013.01); G02B 6/26 (2013.01);
Abstract

A connection structure of optical waveguide chips includes a base substrate () in which grooves () are formed, spacer optical fibers () each disposed for a corresponding one of the grooves () and fitted in the groove () while partially projecting from the base substrate (), and silica-based PLCs () that are a plurality of optical waveguide chips in each of which grooves () fitted on the projecting portions of the spacer optical fibers () are formed at positions of an optical waveguide layer () facing the grooves (), and each of which is mounted on the base substrate () while being supported by the spacer optical fibers (). The silica-based PLCs () are mounted on the base substrate () such that incident/exit end faces of the optical waveguide layers () face each other.


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