The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Nov. 15, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Chan Hee Jeong, Asan-si, KR;

Hyun Ki Seo, Suwon-si, KR;

Joo Hyung Lee, Cheonan-si, KR;

Jae Gil Lim, Cheonan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/3128 (2013.01); H01L 25/0657 (2013.01);
Abstract

A semiconductor package includes a buffer wafer including: a first surface; and a second surface opposite to the first surface, a stacked structure including a plurality of chips being stacked on the first surface of the buffer wafer; a first detection line formed around a periphery of the stacked structure on the first surface of the buffer wafer; and a mold layer covering the stacked structure, the first detection line and the first surface of the buffer wafer.


Find Patent Forward Citations

Quick Actions:

Jeong, Chan. (2021). Semiconductor package, buffer wafer for semiconductor package, and method of manufacturing semiconductor package (U.S. Patent No. 11031307). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11031307

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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